Are you using DMA?
P.S. Have you checked the data integrity at that alleged 250MHz?
Yes, I’m checking it both through regular pointer-based reads/writes to uncached memory and through DMA (also uncached). The speed tests are done with DMA, and the data passes the integrity checks.
Exactly! And 50 ns is completely sufficient when working without flash involved (that gives around 7–8 min_deselect). But when I’m running code from flash, I suddenly need about 253 ns. That’s why I think the issue is specifically in the device switching.Also I see in LY68L6400 datasheet
tCPH CE# HIGH between subsequent burst operations 50ns
It’s very strange.
Statistics: Posted by nightrain912 — Mon Nov 24, 2025 9:20 am