Just a quick update, getting rid of any FPU operations I've got
ARM: 696-702 MHz
RISC-V: 702-720 MHz
So reducing internal power works, VREG is limited to 200 mA, and better leave it like that, pushing more becomes destructive.
The next biggest consumer is XIP (Flash cache), you can use PICO_COPY_TO_RAM option, run the code entirely from RAM, and disable XIP.
WFE/WFI doesn't stop the cores but put them in idle (ARM sleep), there is a configuration to get them in ARM deep-sleep (stops the clock to the core until wake-up).
Look in datasheet 14.9.7.1. Peripheral power consumption
ARM: 696-702 MHz
RISC-V: 702-720 MHz
So reducing internal power works, VREG is limited to 200 mA, and better leave it like that, pushing more becomes destructive.
The next biggest consumer is XIP (Flash cache), you can use PICO_COPY_TO_RAM option, run the code entirely from RAM, and disable XIP.
WFE/WFI doesn't stop the cores but put them in idle (ARM sleep), there is a configuration to get them in ARM deep-sleep (stops the clock to the core until wake-up).
Look in datasheet 14.9.7.1. Peripheral power consumption
Not sure if DMA supports Peripheral-to-Peripheral, I guess would require 2 DREQ, and very limited to small FIFOs.Peripheral Typical DVDD Current Consumption (μA/MHz)
DMA 2.6
I2C0 3
I2C1 3.6
IO + Pads 24.5
PWM 9.9
SIO 2
SHA256 0.1
SPI0 1.7
SPI1 1.4
Timer 0 0.8
Timer 1 0.6
TRNG 0.8
UART0 2.6
UART1 3.6
Watchdog 1.1
XIP 37.6
Statistics: Posted by gmx — Sun May 11, 2025 9:37 pm