I learned that in 2019 the VIA VL805 PCIe USB 3.0 controller firmware was updated to support ASPM on the Raspberry Pi 4B / 400. I was surprised when running lspci -vvv under Raspberry Pi OS to see ASPM enabled on the USB controller but disbled on that the Root Complex.
From my (admittedly limited) understanding, ASPM power savings require both ends of the PCIe link to have compatible ASPM settings enabled, otherwise the link remains in L0.
I’m curious how ASPM power savings could still be in effect in this configuration – is there something I’m missing, or is there platform-specific behaviour at play here?
My lspci dump is here: https://github.com/spectrum4/notes/blob ... ecoded.txt
Lines 25/26 for the Root Complex show:
whereas lines 89/90 for USB controller show:
Note, other publicly posted lspci dumps I have found online seem to match mine, e.g. https://pastebin.com/SS71pBD6
From my (admittedly limited) understanding, ASPM power savings require both ends of the PCIe link to have compatible ASPM settings enabled, otherwise the link remains in L0.
I’m curious how ASPM power savings could still be in effect in this configuration – is there something I’m missing, or is there platform-specific behaviour at play here?
My lspci dump is here: https://github.com/spectrum4/notes/blob ... ecoded.txt
Lines 25/26 for the Root Complex show:
Code:
LnkCtl:ASPM Disabled; RCB 64 bytes, Disabled- CommClk+ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-Code:
LnkCtl:ASPM L0s L1 Enabled; RCB 64 bytes, Disabled- CommClk+ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-Statistics: Posted by pmoore — Sun Apr 06, 2025 3:43 pm